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https://github.com/speed47/spectre-meltdown-checker
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feat: add subleaf != 0 support for read_cpuid
This commit is contained in:
Stéphane Lesimple
parent
16f2160be5
commit
1a909def5d
@ -1455,17 +1455,32 @@ read_cpuid()
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{
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# leaf is the value of the eax register when calling the cpuid instruction:
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_leaf="$1"
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# subleaf is the value of the ecx register when calling the cpuid instruction:
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_subleaf="$2"
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# eax=1 ebx=2 ecx=3 edx=4:
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_register="$2"
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# number of bits to shift the register right to:
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_shift="$3"
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_register="$3"
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# number of bits to shift the register right to, 0-31:
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_shift="$4"
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# mask to apply as an AND operand to the shifted register value
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_mask="$4"
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_mask="$5"
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# wanted value (optional), if present we return 0(true) if the obtained value is equal, 1 otherwise:
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_wanted="$5"
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_wanted="$6"
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# in any case, the read value is globally available in $read_cpuid_value
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read_cpuid_value=''
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if [ $# -lt 5 ]; then
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echo "read_cpuid: missing arguments, got only $#, expected at least 5: $*"
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return 2
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fi
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if [ "$_register" -gt 4 ]; then
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echo "read_cpuid: register must be 0-4, got $_register"
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return 2
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fi
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if [ "$_shift" -gt 32 ]; then
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echo "read_cpuid: shift must be 0-31, got $_shift"
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return 2
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fi
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if [ ! -e /dev/cpu/0/cpuid ] && [ ! -e /dev/cpuctl0 ]; then
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# try to load the module ourselves (and remember it so we can rmmod it afterwards)
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load_cpuid
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@ -1480,9 +1495,11 @@ read_cpuid()
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dd if=/dev/cpu/0/cpuid bs=16 count=1 >/dev/null 2>&1 || load_cpuid
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# we need _leaf to be converted to decimal for dd
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_leaf=$(( _leaf ))
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_subleaf=$(( _subleaf ))
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_position=$(( _leaf + (_subleaf << 32) ))
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# to avoid using iflag=skip_bytes, which doesn't exist on old versions of dd, seek to the closer multiple-of-16
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_ddskip=$(( _leaf / 16 ))
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_odskip=$(( _leaf - _ddskip * 16 ))
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_ddskip=$(( _position / 16 ))
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_odskip=$(( _position - _ddskip * 16 ))
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# now read the value
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_cpuid=$(dd if=/dev/cpu/0/cpuid bs=16 skip=$_ddskip count=$((_odskip + 1)) 2>/dev/null | od -j $((_odskip * 16)) -A n -t u4)
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elif [ -e /dev/cpuctl0 ]; then
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@ -1490,20 +1507,20 @@ read_cpuid()
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if [ ! -r /dev/cpuctl0 ]; then
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return 2
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fi
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_cpuid=$(cpucontrol -i "$_leaf" /dev/cpuctl0 2>/dev/null | awk '{print $4,$5,$6,$7}')
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# cpuid level 0x1: 0x000306d4 0x00100800 0x4dfaebbf 0xbfebfbff
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_cpuid=$(cpucontrol -i "$_leaf","$_subleaf" /dev/cpuctl0 2>/dev/null | cut -d: -f2-)
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# cpuid level 0x4, level_type 0x2: 0x1c004143 0x01c0003f 0x000001ff 0x00000000
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else
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return 2
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fi
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_debug "cpuid: leaf$_leaf on cpu0, eax-ebx-ecx-edx: $_cpuid"
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_mockvarname="SMC_MOCK_CPUID_${_leaf}"
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_debug "cpuid: leaf$_leaf subleaf$_subleaf on cpu0, eax-ebx-ecx-edx: $_cpuid"
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_mockvarname="SMC_MOCK_CPUID_${_leaf}_${_subleaf}"
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if [ -n "$(eval echo \$$_mockvarname)" ]; then
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_cpuid="$(eval echo \$$_mockvarname)"
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_debug "read_cpuid: MOCKING enabled for leaf $_leaf, will return $_cpuid"
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_debug "read_cpuid: MOCKING enabled for leaf $_leaf subleaf $_subleaf, will return $_cpuid"
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mocked=1
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else
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mockme=$(printf "%b\n%b" "$mockme" "SMC_MOCK_CPUID_${_leaf}='$_cpuid'")
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mockme=$(printf "%b\n%b" "$mockme" "SMC_MOCK_CPUID_${_leaf}_${_subleaf}='$_cpuid'")
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fi
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[ -z "$_cpuid" ] && return 2
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# get the value of the register we want
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@ -1633,7 +1650,7 @@ parse_cpu_details()
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fi
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# get raw cpuid, it's always useful (referenced in the Intel doc for firmware updates for example)
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if read_cpuid 0x1 $EAX 0 0xFFFFFFFF; then
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if read_cpuid 0x1 0x0 $EAX 0 0xFFFFFFFF; then
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cpu_cpuid="$read_cpuid_value"
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else
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cpu_cpuid=0
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@ -2413,6 +2430,7 @@ write_msr()
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# read_msr
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# param1 (mandatory): MSR, can be in hex or decimal.
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# param2 (optional): CPU index, starting from 0. Default 0.
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# returned data is available in $read_msr_value
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read_msr()
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{
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_msr_dec=$(( $1 ))
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@ -2552,14 +2570,14 @@ check_cpu()
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# amd: https://developer.amd.com/wp-content/resources/Architecture_Guidelines_Update_Indirect_Branch_Control.pdf
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# amd: 8000_0008 EBX[14]=1
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if is_intel; then
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read_cpuid 0x7 $EDX 26 1 1; ret=$?
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read_cpuid 0x7 0x0 $EDX 26 1 1; ret=$?
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if [ $ret -eq 0 ]; then
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pstatus green YES "SPEC_CTRL feature bit"
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cpuid_spec_ctrl=1
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cpuid_ibrs='SPEC_CTRL'
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fi
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elif is_amd || is_hygon; then
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read_cpuid 0x80000008 $EBX 14 1 1; ret=$?
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read_cpuid 0x80000008 0x0 $EBX 14 1 1; ret=$?
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if [ $ret -eq 0 ]; then
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pstatus green YES "IBRS_SUPPORT feature bit"
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cpuid_ibrs='IBRS_SUPPORT'
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@ -2578,7 +2596,7 @@ check_cpu()
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if is_amd || is_hygon; then
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_info_nol " * CPU indicates preferring IBRS always-on: "
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# amd or hygon
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read_cpuid 0x80000008 $EBX 16 1 1; ret=$?
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read_cpuid 0x80000008 0x0 $EBX 16 1 1; ret=$?
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if [ $ret -eq 0 ]; then
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pstatus green YES
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else
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@ -2587,7 +2605,7 @@ check_cpu()
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_info_nol " * CPU indicates preferring IBRS over retpoline: "
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# amd or hygon
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read_cpuid 0x80000008 $EBX 18 1 1; ret=$?
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read_cpuid 0x80000008 0x0 $EBX 18 1 1; ret=$?
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if [ $ret -eq 0 ]; then
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pstatus green YES
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else
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@ -2651,7 +2669,7 @@ check_cpu()
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pstatus yellow NO
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fi
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elif is_amd || is_hygon; then
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read_cpuid 0x80000008 $EBX 12 1 1; ret=$?
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read_cpuid 0x80000008 0x0 $EBX 12 1 1; ret=$?
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if [ $ret -eq 0 ]; then
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cpuid_ibpb='IBPB_SUPPORT'
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pstatus green YES "IBPB_SUPPORT feature bit"
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@ -2677,19 +2695,19 @@ check_cpu()
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# intel: A processor supports STIBP if it enumerates CPUID (EAX=7H,ECX=0):EDX[27] as 1
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# amd: 8000_0008 EBX[15]=1
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if is_intel; then
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read_cpuid 0x7 $EDX 27 1 1; ret=$?
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read_cpuid 0x7 0x0 $EDX 27 1 1; ret=$?
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if [ $ret -eq 0 ]; then
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pstatus green YES "Intel STIBP feature bit"
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#cpuid_stibp='Intel STIBP'
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fi
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elif is_amd; then
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read_cpuid 0x80000008 $EBX 15 1 1; ret=$?
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read_cpuid 0x80000008 0x0 $EBX 15 1 1; ret=$?
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if [ $ret -eq 0 ]; then
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pstatus green YES "AMD STIBP feature bit"
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#cpuid_stibp='AMD STIBP'
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fi
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elif is_hygon; then
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read_cpuid 0x80000008 $EBX 15 1 1; ret=$?
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read_cpuid 0x80000008 0x0 $EBX 15 1 1; ret=$?
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if [ $ret -eq 0 ]; then
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pstatus green YES "HYGON STIBP feature bit"
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#cpuid_stibp='HYGON STIBP'
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@ -2707,7 +2725,7 @@ check_cpu()
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if is_amd || is_hygon; then
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_info_nol " * CPU indicates preferring STIBP always-on: "
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read_cpuid 0x80000008 $EBX 17 1 1; ret=$?
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read_cpuid 0x80000008 0x0 $EBX 17 1 1; ret=$?
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if [ $ret -eq 0 ]; then
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pstatus green YES
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else
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@ -2719,15 +2737,15 @@ check_cpu()
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if is_intel; then
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_info " * Speculative Store Bypass Disable (SSBD)"
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_info_nol " * CPU indicates SSBD capability: "
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read_cpuid 0x7 $EDX 31 1 1; ret24=$?; ret25=$ret24
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read_cpuid 0x7 0x0 $EDX 31 1 1; ret24=$?; ret25=$ret24
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if [ $ret24 -eq 0 ]; then
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cpuid_ssbd='Intel SSBD'
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fi
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elif is_amd; then
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_info " * Speculative Store Bypass Disable (SSBD)"
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_info_nol " * CPU indicates SSBD capability: "
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read_cpuid 0x80000008 $EBX 24 1 1; ret24=$?
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read_cpuid 0x80000008 $EBX 25 1 1; ret25=$?
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read_cpuid 0x80000008 0x0 $EBX 24 1 1; ret24=$?
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read_cpuid 0x80000008 0x0 $EBX 25 1 1; ret25=$?
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if [ $ret24 -eq 0 ]; then
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cpuid_ssbd='AMD SSBD in SPEC_CTRL'
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#cpuid_ssbd_spec_ctrl=1
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@ -2740,8 +2758,8 @@ check_cpu()
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elif is_hygon; then
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_info " * Speculative Store Bypass Disable (SSBD)"
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_info_nol " * CPU indicates SSBD capability: "
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read_cpuid 0x80000008 $EBX 24 1 1; ret24=$?
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read_cpuid 0x80000008 $EBX 25 1 1; ret25=$?
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read_cpuid 0x80000008 0x0 $EBX 24 1 1; ret24=$?
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read_cpuid 0x80000008 0x0 $EBX 25 1 1; ret25=$?
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if [ $ret24 -eq 0 ]; then
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cpuid_ssbd='HYGON SSBD in SPEC_CTRL'
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@ -2764,13 +2782,13 @@ check_cpu()
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if is_amd; then
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# similar to SSB_NO for intel
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read_cpuid 0x80000008 $EBX 26 1 1; ret=$?
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read_cpuid 0x80000008 0x0 $EBX 26 1 1; ret=$?
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if [ $ret -eq 0 ]; then
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amd_ssb_no=1
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fi
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elif is_hygon; then
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# indicate when speculative store bypass disable is no longer needed to prevent speculative loads bypassing older stores
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read_cpuid 0x80000008 $EBX 26 1 1; ret=$?
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read_cpuid 0x80000008 0x0 $EBX 26 1 1; ret=$?
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if [ $ret -eq 0 ]; then
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hygon_ssb_no=1
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_debug "hygon_ssb_no=1"
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@ -2821,7 +2839,7 @@ check_cpu()
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fi
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# CPUID of L1D
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_info_nol " * CPU indicates L1D flush capability: "
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read_cpuid 0x7 $EDX 28 1 1; ret=$?
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read_cpuid 0x7 0x0 $EDX 28 1 1; ret=$?
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if [ $ret -eq 0 ]; then
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pstatus green YES "L1D flush feature bit"
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cpuid_l1df=1
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@ -2834,7 +2852,7 @@ check_cpu()
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if is_intel; then
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_info " * Microarchitectural Data Sampling"
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_info_nol " * VERW instruction is available: "
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read_cpuid 0x7 $EDX 10 1 1; ret=$?
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read_cpuid 0x7 0x0 $EDX 10 1 1; ret=$?
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if [ $ret -eq 0 ]; then
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cpuid_md_clear=1
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pstatus green YES "MD_CLEAR feature bit"
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@ -2852,7 +2870,7 @@ check_cpu()
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_info_nol " * CPU indicates ARCH_CAPABILITIES MSR availability: "
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cpuid_arch_capabilities=-1
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# A processor supports the ARCH_CAPABILITIES MSR if it enumerates CPUID (EAX=7H,ECX=0):EDX[29] as 1
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read_cpuid 0x7 $EDX 29 1 1; ret=$?
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read_cpuid 0x7 0x0 $EDX 29 1 1; ret=$?
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if [ $ret -eq 0 ]; then
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pstatus green YES
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cpuid_arch_capabilities=1
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@ -3057,7 +3075,7 @@ check_cpu()
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ret=1
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cpuid_rtm=0
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if is_intel; then
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read_cpuid 0x7 $EBX 11 1 1; ret=$?
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read_cpuid 0x7 0x0 $EBX 11 1 1; ret=$?
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fi
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if [ $ret -eq 0 ]; then
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cpuid_rtm=1
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@ -3073,7 +3091,7 @@ check_cpu()
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ret=1
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cpuid_sgx=0
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if is_intel; then
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read_cpuid 0x7 $EBX 2 1 1; ret=$?
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read_cpuid 0x7 0x0 $EBX 2 1 1; ret=$?
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fi
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if [ $ret -eq 0 ]; then
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pstatus blue YES
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@ -3092,7 +3110,7 @@ check_cpu()
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cpuid_srbds=0
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srbds_on=0
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if is_intel; then
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read_cpuid 0x7 $EDX 9 1 1; ret=$?
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read_cpuid 0x7 0x0 $EDX 9 1 1; ret=$?
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fi
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if [ $ret -eq 0 ]; then
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pstatus blue YES
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@ -4092,14 +4110,14 @@ pti_performance_check()
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if [ -e "$procfs/cpuinfo" ] && grep ^flags "$procfs/cpuinfo" | grep -qw pcid; then
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cpu_pcid=1
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else
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read_cpuid 0x1 $ECX 17 1 1; ret=$?
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read_cpuid 0x1 0x0 $ECX 17 1 1; ret=$?
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[ $ret -eq 0 ] && cpu_pcid=1
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fi
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if [ -e "$procfs/cpuinfo" ] && grep ^flags "$procfs/cpuinfo" | grep -qw invpcid; then
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cpu_invpcid=1
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else
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read_cpuid 0x7 $EBX 10 1 1; ret=$?
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read_cpuid 0x7 0x0 $EBX 10 1 1; ret=$?
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[ $ret -eq 0 ] && cpu_invpcid=1
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fi
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