Table
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@ -434,11 +434,11 @@ On the ARM architecture, we utilized the \textsc{ArmPL} library for BLAS operati
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\begin{ruledtabular}
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\begin{tabular}{lccccccc}
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CPU & $N_{\text{cores}}$ & Shared L3 cache & $V$ & $F$ & Memory Bandwidth & Peak DP & Measured performance \\
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& (MB) & & & (GHz) & (GB/s) & (GFlop/s) & (GFlop/s) \\
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& & (MB) & & (GHz) & (GB/s) & (GFlop/s) & (GFlop/s) \\
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\hline
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\textsc{EPYC} 7513 & $2\times 128$ & $2 \times 32)$ & 4 & 2.6 & 409.6 & 2~662 & 1~576 \\
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Xeon Gold 6130 & $2\times 22$ & $2 \times 16)$ & 8 & 2.1 & 256.0 & 2~150 & 667 \\ % 239.891
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ARM Q80 & $32$ & $80$ & 2 & 2.8 & 204.8 & 1~792 & 547 \\ % 292.492
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\textsc{EPYC} 7513 & $2 \times 32$ & $2\times 128$ & 4 & 2.6 & 409.6 & 2~662 & 1~576 \\
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Xeon Gold 6130 & $2 \times 16$ & $2\times 22$ & 8 & 2.1 & 256.0 & 2~150 & 667 \\ % 239.891
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ARM Q80 & $80$ & $32$ & 2 & 2.8 & 204.8 & 1~792 & 547 \\ % 292.492
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\end{tabular}
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\end{ruledtabular}
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\caption{\label{tab:flops} Average performance of the code measured as the number of double precision (DP) floating-point operations per second (Flop/s) on different machines.}
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