glitsj16
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bea5cfc3b8
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Fix typo: /devnull file created in filesystem
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2023-02-24 19:42:16 +01:00 |
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Stéphane Lesimple
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b68ebe67f2
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fix: fwdb: ignore MCEdb versions where an official Intel version exists (fixes #430)
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2022-03-30 09:10:55 +02:00 |
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Stéphane Lesimple
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a6c943d38f
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release v0.45
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2022-03-27 12:41:17 +02:00 |
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Stéphane Lesimple
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dd162301ff
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chore: update fwdb to v222+i20220208
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2022-03-27 12:38:44 +02:00 |
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Stéphane Lesimple
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5f6471d9a4
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feat: set default TMPDIR for Android (#415)
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2022-03-27 12:31:05 +02:00 |
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Stéphane Lesimple
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2a5b965b98
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feat: add --allow-msr-write, no longer write by default (#385), detect when writing is denied
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2022-03-24 12:37:19 +01:00 |
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Stéphane Lesimple
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ee266d43b7
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chore: fix indentation
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2022-03-21 22:22:33 +01:00 |
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Stéphane Lesimple
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b61baa90df
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feat: bsd: for unimplemented CVEs, at least report when CPU is not affected
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2022-03-21 22:22:33 +01:00 |
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Stéphane Lesimple
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a98d92f8bc
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chore: wording: model not vulnerable -> model not affected
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2022-03-21 22:22:33 +01:00 |
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Stéphane Lesimple
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b7c8c4115a
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feat: implement detection for MCEPSC under BSD
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2022-03-21 22:22:33 +01:00 |
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Stéphane Lesimple
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4e7c52767d
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chore: update Intel Family 6 models
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2022-03-21 22:22:33 +01:00 |
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Stéphane Lesimple
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8473d9ba6b
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chore: ensure vars are set before being dereferenced (set -u compat)
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2022-03-21 22:22:33 +01:00 |
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Stéphane Lesimple
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0af4830224
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fix: is_ucode_blacklisted: fix some model names
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2022-03-21 22:22:33 +01:00 |
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Stéphane Lesimple
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81a4329d71
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feat: add --cpu, apply changes to (read|write)_msr, update fwdb to v221+i20220208
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2022-03-21 22:22:33 +01:00 |
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Stéphane Lesimple
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3679776f3c
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chore: only attempt to load msr and cpuid module once
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2022-03-21 22:22:33 +01:00 |
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Stéphane Lesimple
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ba131fcd2f
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chore: read_cpuid: use named constants
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2022-03-21 22:22:33 +01:00 |
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Stéphane Lesimple
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ae6bc31c2c
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feat: hw check: add IPRED, RRSBA, BHI features check
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2022-03-21 22:22:33 +01:00 |
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Stéphane Lesimple
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6d7a6b3666
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feat: add subleaf != 0 support for read_cpuid
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2022-03-21 22:22:33 +01:00 |
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Stéphane Lesimple
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16f2160be5
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chore: fwdb: update to v220+i20220208
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2022-03-17 19:39:39 +01:00 |
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Aditya-Tolikar
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7cad9301b3
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typo
'A' is more 'X' *than 'B'.
Previously: 'A' is more 'X' that 'B'.
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2022-03-17 19:26:12 +01:00 |
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Stéphane Lesimple
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580549812a
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fix: retpoline: detection on 5.15.28+ (#420)
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2022-03-17 19:25:24 +01:00 |
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Stéphane Lesimple
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a485c7882a
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doc: readme: make the FAQ entry more visible
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2021-05-25 13:22:54 +02:00 |
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Stéphane Lesimple
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7d13f7a0ef
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doc: add an FAQ entry about CVE support
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2021-05-25 13:17:03 +02:00 |
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Stéphane Lesimple
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226b2375ab
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chore: speculative execution -> transient execution
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2021-05-25 12:39:51 +02:00 |
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Stéphane Lesimple
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052a3e66d1
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doc: more FAQ and README
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2021-05-25 12:31:30 +02:00 |
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Stéphane Lesimple
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05d862709d
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fix: has_vmm false positive with pcp
Fix by matching the full procname with pgrep (-x),
so that the 'pmdakvm' process doesn't match.
Closes #394
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2021-05-25 12:31:07 +02:00 |
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Stéphane Lesimple
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3846913899
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fix: refuse to run under MacOS and ESXi
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2021-05-24 22:42:23 +02:00 |
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Stéphane Lesimple
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a87ace1f98
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doc: add an FAQ.md and update the README.md accordingly
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2021-05-24 22:27:46 +02:00 |
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Stéphane Lesimple
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0ba71a443e
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fix: mcedb: v191 changed the MCE table format
Also update the builtin db to v191+i20210217
Closes #400
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2021-05-24 12:55:44 +02:00 |
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Stéphane Lesimple
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3a486e9985
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arm64: variant 4: detect ssbd mitigation from kernel img, system.map or kconfig
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2021-04-02 15:38:31 +02:00 |
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Stéphane Lesimple
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23564cda5d
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fix: variant4: added case where prctl ssbd status is tagged as 'unknown'
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2021-04-02 15:38:31 +02:00 |
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Stéphane Lesimple
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0ea21d09bd
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fix: extract_kernel: don't overwrite kernel_err if already set
Fixes #395
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2021-04-02 15:33:02 +02:00 |
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Stéphane Lesimple
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08e30e156d
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chore: readme: framapic is gone, host the screenshots on GitHub
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2021-02-22 21:22:11 +01:00 |
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Zhiyuan Dai
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6d35e780f4
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arm64: phytium: Add CPU Implementer Phytium
This patch adds 0x70 check for phytium implementer id in function
parse_cpu_details. Also adds that Phytium Soc is not vulnerable to variant 3/3a
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2021-01-13 19:14:09 +01:00 |
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Stéphane Lesimple
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4ec3154be0
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chore: replace 'Vulnerable to' by 'Affected by' in the hw section
This seems to be less confusing, suggested by #356
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2020-11-10 18:56:25 +01:00 |
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Stéphane Lesimple
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843f26630d
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feat: arm: add Cortex A77 and Neoverse-N1 (fixes #371)
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2020-11-10 18:36:42 +01:00 |
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Stéphane Lesimple
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7fc2ec65b9
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bump to v0.44
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2020-11-09 18:41:43 +01:00 |
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Stéphane Lesimple
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c8cdfd54da
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chore: fwdb: update to v165.20201021+i20200616
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2020-11-08 21:25:18 +01:00 |
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Stéphane Lesimple
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f0c33c7a32
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fix: fwdb: use the commit date as the intel fwdb version
fixes #379
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2020-11-08 21:25:18 +01:00 |
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Stéphane Lesimple
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9e874397da
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chore: fwdb: update to v163.20200930+i20200904
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2020-10-05 20:06:49 +02:00 |
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Stéphane Lesimple
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76cb73f3cb
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fix: fwdb: update Intel's repository URL
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2020-10-05 20:06:49 +02:00 |
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Stéphane Lesimple
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90f23d286e
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chore: update fwdb to v160.20200912+i20200722
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2020-09-14 21:45:09 +02:00 |
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Stéphane Lesimple
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e41e311a7f
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feat: add zstd kernel decompression (#370)
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2020-09-14 21:42:55 +02:00 |
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Stéphane Lesimple
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1f75f01630
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fwdb: update MCEdb to v148 & Intel firmwares to 2020-04-27
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2020-06-13 18:11:12 +02:00 |
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Stéphane Lesimple
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14a53b19da
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chore: add CVE to the README
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2020-06-10 00:07:14 +02:00 |
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Stéphane Lesimple
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d8f0ddd7a5
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chore: fix indentation
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2020-06-10 00:07:14 +02:00 |
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Agata Gruza
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62d3448a54
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Added support for SRBDS related vulnerabilities
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2020-06-10 00:07:14 +02:00 |
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Stéphane Lesimple
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cb6d139629
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chore: tests: now expect 15 CVEs instead of 14 (fix)
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2020-06-09 22:56:25 +02:00 |
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Stéphane Lesimple
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7e2db09ed9
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chore: tests: now expect 15 CVEs instead of 14
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2020-06-09 22:51:50 +02:00 |
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Stéphane Lesimple
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33cf1cde79
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enh: arm: add experimental support for binary arm images
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2020-06-06 17:29:32 +02:00 |
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