From dd9c6dcc03e6d24a78ed5651e5c825e81d68a9c6 Mon Sep 17 00:00:00 2001 From: Anthony Scemama Date: Tue, 9 Jul 2024 21:11:13 +0200 Subject: [PATCH 1/4] Introducing dpcpp --- configure | 8 +- plugins/local/gpu_intel/LIB | 1 + plugins/local/gpu_intel/NEED | 1 + plugins/local/gpu_intel/README.rst | 8 + plugins/local/gpu_intel/gpu.sycl | 266 +++++++++++++++++++++++++++++ 5 files changed, 282 insertions(+), 2 deletions(-) create mode 100644 plugins/local/gpu_intel/LIB create mode 100644 plugins/local/gpu_intel/NEED create mode 100644 plugins/local/gpu_intel/README.rst create mode 100644 plugins/local/gpu_intel/gpu.sycl diff --git a/configure b/configure index 08dac444..3e3390e1 100755 --- a/configure +++ b/configure @@ -40,7 +40,7 @@ Usage: $(basename $0) -c $(basename $0) -h $(basename $0) -i - $(basename $0) -g [nvidia|none] + $(basename $0) -g [nvidia|intel|none] Options: -c Define a COMPILATION configuration file, @@ -49,7 +49,7 @@ Options: -i INSTALL . Use at your OWN RISK: no support will be provided for the installation of dependencies. - -g [nvidia|none] Choose GPU acceleration (experimental) + -g [nvidia|intel|none] Choose GPU acceleration Example: ./$(basename $0) -c config/gfortran.cfg @@ -121,6 +121,10 @@ case "$GPU" in echo "Activating AMD GPU acceleration" ln -s ${QP_ROOT}/plugins/local/gpu_amd ${QP_ROOT}/src/gpu_arch ;; + intel) # Intel + echo "Activating Intel GPU acceleration" + ln -s ${QP_ROOT}/plugins/local/gpu_intel ${QP_ROOT}/src/gpu_arch + ;; nvidia) # Nvidia echo "Activating Nvidia GPU acceleration" ln -s ${QP_ROOT}/plugins/local/gpu_nvidia ${QP_ROOT}/src/gpu_arch diff --git a/plugins/local/gpu_intel/LIB b/plugins/local/gpu_intel/LIB new file mode 100644 index 00000000..027c35b0 --- /dev/null +++ b/plugins/local/gpu_intel/LIB @@ -0,0 +1 @@ +-lmkl_sycl -lsycl diff --git a/plugins/local/gpu_intel/NEED b/plugins/local/gpu_intel/NEED new file mode 100644 index 00000000..8b137891 --- /dev/null +++ b/plugins/local/gpu_intel/NEED @@ -0,0 +1 @@ + diff --git a/plugins/local/gpu_intel/README.rst b/plugins/local/gpu_intel/README.rst new file mode 100644 index 00000000..3a4653de --- /dev/null +++ b/plugins/local/gpu_intel/README.rst @@ -0,0 +1,8 @@ +========= +gpu_intel +========= + +Intel implementation of GPU routines. Uses MKL and SYCL. +```bash +dpcpp -O3 -c gpu.o gpu.sycl +``` diff --git a/plugins/local/gpu_intel/gpu.sycl b/plugins/local/gpu_intel/gpu.sycl new file mode 100644 index 00000000..7b589490 --- /dev/null +++ b/plugins/local/gpu_intel/gpu.sycl @@ -0,0 +1,266 @@ +#include +#include +#include +#include + +extern "C" { + +/* Generic functions */ + +int gpu_ndevices() { + return 1; +} + +void gpu_set_device(int32_t igpu) { +} + + +/* Allocation functions */ + +void gpu_allocate(void** ptr, int64_t size) { + auto queue = sycl::queue(sycl::default_selector{}); + + try { + *ptr = sycl::malloc_shared(size, queue); + assert(*ptr != nullptr); + } catch (const sycl::exception& e) { + std::cerr << "SYCL exception caught: " << e.what() << std::endl; + *ptr = nullptr; // If allocation fails, set pointer to nullptr + } +} + +void gpu_deallocate(void** ptr) { + assert(*ptr != nullptr); + sycl::free(*ptr, sycl::queue(sycl::default_selector{})); + *ptr = nullptr; +} + +/* Upload data from host to device */ +void gpu_upload(const void* cpu_ptr, void* gpu_ptr, const int64_t n) { + sycl::queue queue(sycl::default_selector{}); + queue.memcpy(gpu_ptr, cpu_ptr, n).wait(); +} + +/* Download data from device to host */ +void gpu_download(const void* gpu_ptr, void* cpu_ptr, const int64_t n) { + sycl::queue queue(sycl::default_selector{}); + queue.memcpy(cpu_ptr, gpu_ptr, n).wait(); +} + +/* Copy data from one GPU memory location to another */ +void gpu_copy(const void* gpu_ptr_src, void* gpu_ptr_dest, const int64_t n) { + sycl::queue queue(sycl::default_selector{}); + queue.memcpy(gpu_ptr_dest, gpu_ptr_src, n).wait(); +} + +/* Queues */ + +/* SYCL queue as a replacement for CUDA stream */ +void gpu_stream_create(sycl::queue** ptr) { + *ptr = new sycl::queue(sycl::default_selector{}); +} + +void gpu_stream_destroy(sycl::queue** ptr) { + assert(*ptr != nullptr); + delete *ptr; + *ptr = nullptr; +} + +To translate the CUDA functions related to stream management to SYCL, you will need to adapt to SYCL's approach to command groups and queues. SYCL uses queues to manage execution order and parallelism, similar to CUDA streams but integrated within the SYCL ecosystem. + +### Original CUDA Code + +```c +/* Create a CUDA stream */ +void gpu_stream_create(cudaStream_t* ptr) { + cudaError_t rc = cudaStreamCreate(ptr); + assert(rc == cudaSuccess); +} + +/* Destroy a CUDA stream */ +void gpu_stream_destroy(cudaStream_t* ptr) { + assert(ptr != NULL); + cudaError_t rc = cudaStreamDestroy(*ptr); + assert(rc == cudaSuccess); + *ptr = NULL; +} + +/* Set a specific stream for cuBLAS operations */ +void gpu_set_stream(cublasHandle_t handle, cudaStream_t stream) { + cublasSetStream(handle, stream); +} + +/* Synchronize all streams */ +void gpu_synchronize() { + cudaDeviceSynchronize(); +} +``` + +### Translated SYCL Code + +```cpp +#include +#include + +/* SYCL queue as a replacement for CUDA stream */ +void gpu_stream_create(sycl::queue** ptr) { + *ptr = new sycl::queue(sycl::default_selector{}); +} + +void gpu_stream_destroy(sycl::queue** ptr) { + *ptr->wait_and_throw(); + assert(*ptr != nullptr); + delete *ptr; + *ptr = nullptr; +} + +/* SYCL does not need an equivalent for setting a stream on a cuBLAS handle, + because each SYCL queue acts independently and can be used directly. */ + +void gpu_synchronize() { + sycl::queue queue(sycl::default_selector{}); + queue.wait_and_throw(); +} + +/* BLAS functions */ + +typedef struct { + sycl::queue* queue; +} blasHandle_t; + +void gpu_set_stream(blasHandle_t* handle, sycl::queue* ptr) { + handle->queue = ptr; +} + +void gpu_blas_create(blasHandle_t* ptr) { + *ptr = new blasHandle_t; + assert(*ptr != nullptr); + ptr->queue = new sycl::queue(sycl::default_selector{}); + assert(ptr->queue != nullptr); +} + +void gpu_blas_destroy(blasHandle_t* ptr) { + assert(*ptr != nullptr); + delete ptr->queue; + delete *ptr; + *ptr = nullptr; +} + + +void gpu_ddot(blasHandle_t* handle, const int64_t n, const double* x, const int64_t incx, + const double* y, const int64_t incy, double* result) { + // Ensure input parameters are valid + assert(handle != nullptr); + assert(handle->queue != nullptr); + assert(n > 0); + assert(incx > 0); + assert(incy > 0); + assert(x != nullptr); + assert(y != nullptr); + assert(result != nullptr); + + // SYCL buffer for the result + sycl::buffer result_buf(result, sycl::range<1>(1)); + + sycl::queue& queue = handle->queue; + + // Perform the dot product operation + queue.submit([&](sycl::handler& cgh) { + // Accessors for the buffers + auto result_acc = result_buf.get_access(cgh); + + // This is an asynchronous call to compute dot product + cgh.single_task([=]() { + result_acc[0] = oneapi::mkl::blas::dot(cgh, n, x, incx, y, incy); + }); + }); + +} + +void gpu_dgemv(blasHandle_t* handle, const char* transa, const int64_t m, const int64_t n, const double* alpha, + const double* a, const int64_t lda, const double* x, const int64_t incx, const double* beta, double* y, const int64_t incy) { + + assert(handle != nullptr); + assert(handle->queue != nullptr); + + // Validate matrix dimensions and increments to be positive + assert(m > 0 && n > 0 && lda > 0 && incx > 0 && incy > 0); + assert(a != nullptr && x != nullptr && y != nullptr && alpha != nullptr && beta != nullptr); + + // Determine the operation type + oneapi::mkl::transpose transa_ = oneapi::mkl::transpose::nontrans; + if (*transa == 'T' || *transa == 't') { + transa_ = oneapi::mkl::transpose::trans; + } + + // Perform DGEMV operation using oneMKL + handle->queue->submit([&](sycl::handler& cgh) { + // Use accessors to ensure data consistency and dependency resolution + auto a_acc = sycl::accessor(a, sycl::range(m * lda), sycl::read_only, cgh); + auto x_acc = sycl::accessor(x, sycl::range(n * incx), sycl::read_only, cgh); + auto y_acc = sycl::accessor(y, sycl::range(m * incy), sycl::read_write, cgh); + + cgh.parallel_for(sycl::range(1), [=](sycl::id<1>) { + oneapi::mkl::blas::gemv(*handle->queue, transa_, m, n, *alpha, a_acc.get_pointer(), lda, x_acc.get_pointer(), incx, *beta, y_acc.get_pointer(), incy); + }); + }); + +} + +void gpu_dgemm(blasHandle_t* handle, const char* transa, const char* transb, const int64_t m, const int64_t n, const int64_t k, const double* alpha, + const double* a, const int64_t lda, const double* b, const int64_t ldb, const double* beta, double* c, const int64_t ldc) { + + assert(handle != nullptr && handle->queue != nullptr); + assert(m > 0 && n > 0 && k > 0 && lda > 0 && ldb > 0 && ldc > 0); + assert(a != nullptr && b != nullptr && c != nullptr && alpha != nullptr && beta != nullptr); + + // Transpose operations + auto transa_ = (*transa == 'T' || *transa == 't') ? oneapi::mkl::transpose::trans : oneapi::mkl::transpose::nontrans; + auto transb_ = (*transb == 'T' || *transb == 't') ? oneapi::mkl::transpose::trans : oneapi::mkl::transpose::nontrans; + + // Ensure queue is ready + handle->queue->submit([&](sycl::handler& cgh) { + // Accessors for matrices + auto a_acc = sycl::accessor(a, sycl::range<1>(m * lda), sycl::read_only, cgh); + auto b_acc = sycl::accessor(b, sycl::range<1>(k * ldb), sycl::read_only, cgh); + auto c_acc = sycl::accessor(c, sycl::range<1>(m * ldc), sycl::read_write, cgh); + + cgh.parallel_for(sycl::range(1), [=](sycl::id<1>) { + oneapi::mkl::blas::gemm(*handle->queue, transa_, transb_, m, n, k, + *alpha, a_acc.get_pointer(), lda, + b_acc.get_pointer(), ldb, + *beta, c_acc.get_pointer(), ldc); + }); + }); + +} + +void gpu_dgeam(blasHandle_t* handle, const char* transa, const char* transb, const int64_t m, const int64_t n, const double* alpha, + const double* a, const int64_t lda, const double* beta, const double* b, const int64_t ldb, double* c, const int64_t ldc) { + assert(handle != nullptr && handle->queue != nullptr); + assert(m > 0 && n > 0 && lda > 0 && ldb > 0 && ldc > 0); + assert(a != nullptr && b != nullptr && c != nullptr && alpha != nullptr && beta != nullptr); + + // Determine transpose operations + bool transA = (*transa == 'T' || *transa == 't'); + bool transB = (*transb == 'T' || *transb == 't'); + + handle->queue->submit([&](sycl::handler& cgh) { + auto a_acc = sycl::accessor(a, sycl::range(m * lda), sycl::read_only, cgh); + auto b_acc = sycl::accessor(b, sycl::range(n * ldb), sycl::read_only, cgh); + auto c_acc = sycl::accessor(c, sycl::range(m * ldc), sycl::read_write, cgh); + + cgh.parallel_for(sycl::range<2>(m, n), [=](sycl::id<2> idx) { + int i = idx[0]; + int j = idx[1]; + int ai = transA ? j * lda + i : i * lda + j; + int bi = transB ? j * ldb + i : i * ldb + j; + int ci = i * ldc + j; + + c_acc[ci] = (*alpha) * a_acc[ai] + (*beta) * b_acc[bi]; + }); + }); + +} + +} // extern C From 44b8e22e7aebf4dd89874549eac8bb8aef2fb16d Mon Sep 17 00:00:00 2001 From: Anthony Scemama Date: Tue, 9 Jul 2024 22:02:13 +0200 Subject: [PATCH 2/4] Fixed sycl --- plugins/local/gpu_intel/README.rst | 2 +- plugins/local/gpu_intel/gpu.sycl | 139 ++++++----------------------- 2 files changed, 26 insertions(+), 115 deletions(-) diff --git a/plugins/local/gpu_intel/README.rst b/plugins/local/gpu_intel/README.rst index 3a4653de..d42e2557 100644 --- a/plugins/local/gpu_intel/README.rst +++ b/plugins/local/gpu_intel/README.rst @@ -4,5 +4,5 @@ gpu_intel Intel implementation of GPU routines. Uses MKL and SYCL. ```bash -dpcpp -O3 -c gpu.o gpu.sycl +icpx -fsycl gpu.cxx -c -qmkl=sequential ``` diff --git a/plugins/local/gpu_intel/gpu.sycl b/plugins/local/gpu_intel/gpu.sycl index 7b589490..1f9f89ce 100644 --- a/plugins/local/gpu_intel/gpu.sycl +++ b/plugins/local/gpu_intel/gpu.sycl @@ -18,7 +18,7 @@ void gpu_set_device(int32_t igpu) { /* Allocation functions */ void gpu_allocate(void** ptr, int64_t size) { - auto queue = sycl::queue(sycl::default_selector{}); + auto queue = sycl::queue(sycl::default_selector_v); try { *ptr = sycl::malloc_shared(size, queue); @@ -31,25 +31,25 @@ void gpu_allocate(void** ptr, int64_t size) { void gpu_deallocate(void** ptr) { assert(*ptr != nullptr); - sycl::free(*ptr, sycl::queue(sycl::default_selector{})); + sycl::free(*ptr, sycl::queue(sycl::default_selector_v)); *ptr = nullptr; } /* Upload data from host to device */ void gpu_upload(const void* cpu_ptr, void* gpu_ptr, const int64_t n) { - sycl::queue queue(sycl::default_selector{}); + sycl::queue queue(sycl::default_selector_v); queue.memcpy(gpu_ptr, cpu_ptr, n).wait(); } /* Download data from device to host */ void gpu_download(const void* gpu_ptr, void* cpu_ptr, const int64_t n) { - sycl::queue queue(sycl::default_selector{}); + sycl::queue queue(sycl::default_selector_v); queue.memcpy(cpu_ptr, gpu_ptr, n).wait(); } /* Copy data from one GPU memory location to another */ void gpu_copy(const void* gpu_ptr_src, void* gpu_ptr_dest, const int64_t n) { - sycl::queue queue(sycl::default_selector{}); + sycl::queue queue(sycl::default_selector_v); queue.memcpy(gpu_ptr_dest, gpu_ptr_src, n).wait(); } @@ -57,7 +57,7 @@ void gpu_copy(const void* gpu_ptr_src, void* gpu_ptr_dest, const int64_t n) { /* SYCL queue as a replacement for CUDA stream */ void gpu_stream_create(sycl::queue** ptr) { - *ptr = new sycl::queue(sycl::default_selector{}); + *ptr = new sycl::queue(sycl::default_selector_v); } void gpu_stream_destroy(sycl::queue** ptr) { @@ -66,59 +66,8 @@ void gpu_stream_destroy(sycl::queue** ptr) { *ptr = nullptr; } -To translate the CUDA functions related to stream management to SYCL, you will need to adapt to SYCL's approach to command groups and queues. SYCL uses queues to manage execution order and parallelism, similar to CUDA streams but integrated within the SYCL ecosystem. - -### Original CUDA Code - -```c -/* Create a CUDA stream */ -void gpu_stream_create(cudaStream_t* ptr) { - cudaError_t rc = cudaStreamCreate(ptr); - assert(rc == cudaSuccess); -} - -/* Destroy a CUDA stream */ -void gpu_stream_destroy(cudaStream_t* ptr) { - assert(ptr != NULL); - cudaError_t rc = cudaStreamDestroy(*ptr); - assert(rc == cudaSuccess); - *ptr = NULL; -} - -/* Set a specific stream for cuBLAS operations */ -void gpu_set_stream(cublasHandle_t handle, cudaStream_t stream) { - cublasSetStream(handle, stream); -} - -/* Synchronize all streams */ void gpu_synchronize() { - cudaDeviceSynchronize(); -} -``` - -### Translated SYCL Code - -```cpp -#include -#include - -/* SYCL queue as a replacement for CUDA stream */ -void gpu_stream_create(sycl::queue** ptr) { - *ptr = new sycl::queue(sycl::default_selector{}); -} - -void gpu_stream_destroy(sycl::queue** ptr) { - *ptr->wait_and_throw(); - assert(*ptr != nullptr); - delete *ptr; - *ptr = nullptr; -} - -/* SYCL does not need an equivalent for setting a stream on a cuBLAS handle, - because each SYCL queue acts independently and can be used directly. */ - -void gpu_synchronize() { - sycl::queue queue(sycl::default_selector{}); + sycl::queue queue(sycl::default_selector_v); queue.wait_and_throw(); } @@ -132,17 +81,17 @@ void gpu_set_stream(blasHandle_t* handle, sycl::queue* ptr) { handle->queue = ptr; } -void gpu_blas_create(blasHandle_t* ptr) { - *ptr = new blasHandle_t; +void gpu_blas_create(blasHandle_t** ptr) { + *ptr = (blasHandle_t*) malloc(sizeof(blasHandle_t)); assert(*ptr != nullptr); - ptr->queue = new sycl::queue(sycl::default_selector{}); - assert(ptr->queue != nullptr); + (*ptr)->queue = new sycl::queue(sycl::default_selector_v); + assert((*ptr)->queue != nullptr); } -void gpu_blas_destroy(blasHandle_t* ptr) { +void gpu_blas_destroy(blasHandle_t** ptr) { assert(*ptr != nullptr); - delete ptr->queue; - delete *ptr; + delete (*ptr)->queue; + free(*ptr); *ptr = nullptr; } @@ -159,21 +108,7 @@ void gpu_ddot(blasHandle_t* handle, const int64_t n, const double* x, const int6 assert(y != nullptr); assert(result != nullptr); - // SYCL buffer for the result - sycl::buffer result_buf(result, sycl::range<1>(1)); - - sycl::queue& queue = handle->queue; - - // Perform the dot product operation - queue.submit([&](sycl::handler& cgh) { - // Accessors for the buffers - auto result_acc = result_buf.get_access(cgh); - - // This is an asynchronous call to compute dot product - cgh.single_task([=]() { - result_acc[0] = oneapi::mkl::blas::dot(cgh, n, x, incx, y, incy); - }); - }); + oneapi::mkl::blas::dot(*handle->queue, n, x, incx, y, incy, result); } @@ -194,16 +129,7 @@ void gpu_dgemv(blasHandle_t* handle, const char* transa, const int64_t m, const } // Perform DGEMV operation using oneMKL - handle->queue->submit([&](sycl::handler& cgh) { - // Use accessors to ensure data consistency and dependency resolution - auto a_acc = sycl::accessor(a, sycl::range(m * lda), sycl::read_only, cgh); - auto x_acc = sycl::accessor(x, sycl::range(n * incx), sycl::read_only, cgh); - auto y_acc = sycl::accessor(y, sycl::range(m * incy), sycl::read_write, cgh); - - cgh.parallel_for(sycl::range(1), [=](sycl::id<1>) { - oneapi::mkl::blas::gemv(*handle->queue, transa_, m, n, *alpha, a_acc.get_pointer(), lda, x_acc.get_pointer(), incx, *beta, y_acc.get_pointer(), incy); - }); - }); + oneapi::mkl::blas::column_major::gemv(*handle->queue, transa_, m, n, *alpha, a, lda, x, incx, *beta, y, incy); } @@ -218,23 +144,12 @@ void gpu_dgemm(blasHandle_t* handle, const char* transa, const char* transb, con auto transa_ = (*transa == 'T' || *transa == 't') ? oneapi::mkl::transpose::trans : oneapi::mkl::transpose::nontrans; auto transb_ = (*transb == 'T' || *transb == 't') ? oneapi::mkl::transpose::trans : oneapi::mkl::transpose::nontrans; - // Ensure queue is ready - handle->queue->submit([&](sycl::handler& cgh) { - // Accessors for matrices - auto a_acc = sycl::accessor(a, sycl::range<1>(m * lda), sycl::read_only, cgh); - auto b_acc = sycl::accessor(b, sycl::range<1>(k * ldb), sycl::read_only, cgh); - auto c_acc = sycl::accessor(c, sycl::range<1>(m * ldc), sycl::read_write, cgh); - - cgh.parallel_for(sycl::range(1), [=](sycl::id<1>) { - oneapi::mkl::blas::gemm(*handle->queue, transa_, transb_, m, n, k, - *alpha, a_acc.get_pointer(), lda, - b_acc.get_pointer(), ldb, - *beta, c_acc.get_pointer(), ldc); - }); - }); + oneapi::mkl::blas::column_major::gemm(*handle->queue, transa_, transb_, m, n, k, + *alpha, a, lda, b, ldb, *beta, c, ldc); } + void gpu_dgeam(blasHandle_t* handle, const char* transa, const char* transb, const int64_t m, const int64_t n, const double* alpha, const double* a, const int64_t lda, const double* beta, const double* b, const int64_t ldb, double* c, const int64_t ldc) { assert(handle != nullptr && handle->queue != nullptr); @@ -246,18 +161,14 @@ void gpu_dgeam(blasHandle_t* handle, const char* transa, const char* transb, con bool transB = (*transb == 'T' || *transb == 't'); handle->queue->submit([&](sycl::handler& cgh) { - auto a_acc = sycl::accessor(a, sycl::range(m * lda), sycl::read_only, cgh); - auto b_acc = sycl::accessor(b, sycl::range(n * ldb), sycl::read_only, cgh); - auto c_acc = sycl::accessor(c, sycl::range(m * ldc), sycl::read_write, cgh); - cgh.parallel_for(sycl::range<2>(m, n), [=](sycl::id<2> idx) { - int i = idx[0]; - int j = idx[1]; - int ai = transA ? j * lda + i : i * lda + j; - int bi = transB ? j * ldb + i : i * ldb + j; - int ci = i * ldc + j; + const int i = idx[0]; + const int j = idx[1]; + const int ai = transA ? j * lda + i : i * lda + j; + const int bi = transB ? j * ldb + i : i * ldb + j; + const int ci = i * ldc + j; - c_acc[ci] = (*alpha) * a_acc[ai] + (*beta) * b_acc[bi]; + c[ci] = (*alpha) * a[ai] + (*beta) * b[bi]; }); }); From 6c275d54ef050ec8d210a35aa4bbb2c93d176f34 Mon Sep 17 00:00:00 2001 From: Anthony Scemama Date: Tue, 9 Jul 2024 22:14:19 +0200 Subject: [PATCH 3/4] Fix intent --- src/ccsd/ccsd_space_orb_sub_chol.irp.f | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/ccsd/ccsd_space_orb_sub_chol.irp.f b/src/ccsd/ccsd_space_orb_sub_chol.irp.f index 24fcc5af..6f65ea79 100644 --- a/src/ccsd/ccsd_space_orb_sub_chol.irp.f +++ b/src/ccsd/ccsd_space_orb_sub_chol.irp.f @@ -996,8 +996,8 @@ subroutine compute_J1_chol(nO,nV,t1,t2,v_ovvo,v_ovoo,v_vvoo,d_cc_space_v_vo_chol integer, intent(in) :: nO,nV type(gpu_double2), intent(in) :: t1 type(gpu_double4), intent(in) :: t2, v_ovvo, v_ovoo, v_vvoo + type(gpu_double3), intent(in) :: d_cc_space_v_vo_chol,d_cc_space_v_vv_chol type(gpu_double4), intent(out) :: J1 - type(gpu_double3), intent(out) :: d_cc_space_v_vo_chol,d_cc_space_v_vv_chol integer :: a,tmp_a,b,k,l,c,d,tmp_c,tmp_d,i,j,u,v, beta, gam From f5cf674d7b4eb98637bde7eb07d1119cfeccc557 Mon Sep 17 00:00:00 2001 From: Anthony Scemama Date: Tue, 9 Jul 2024 23:04:22 +0200 Subject: [PATCH 4/4] Fix link stage for intel gpus --- configure | 4 ++-- plugins/local/gpu_intel/LIB | 3 ++- 2 files changed, 4 insertions(+), 3 deletions(-) diff --git a/configure b/configure index 3e3390e1..43ca9f6d 100755 --- a/configure +++ b/configure @@ -117,12 +117,12 @@ done # Handle GPU acceleration rm -f ${QP_ROOT}/src/gpu_arch case "$GPU" in - amd) # Nvidia + amd) # AMD echo "Activating AMD GPU acceleration" ln -s ${QP_ROOT}/plugins/local/gpu_amd ${QP_ROOT}/src/gpu_arch ;; intel) # Intel - echo "Activating Intel GPU acceleration" + echo "Activating Intel GPU acceleration (EXPERIMENTAL)" ln -s ${QP_ROOT}/plugins/local/gpu_intel ${QP_ROOT}/src/gpu_arch ;; nvidia) # Nvidia diff --git a/plugins/local/gpu_intel/LIB b/plugins/local/gpu_intel/LIB index 027c35b0..199b0f1c 100644 --- a/plugins/local/gpu_intel/LIB +++ b/plugins/local/gpu_intel/LIB @@ -1 +1,2 @@ --lmkl_sycl -lsycl +-ltbb -lsycl -lmkl_sycl -lgpu -limf -lintlc -lstdc++ +